NDLI: An Optimization Framework for the Design of High-Speed PCB VIAs

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An Optimization Framework for the Design of High-Speed PCB VIAs

Content Provider	MDPI
Author	Avitabile, Gianfranco Florio, Antonello Gallo, Vito Leonardo Pali, Alessandro Forni, Lorenzo
Copyright Year	2022
Description	Signal integrity represents a key issue in all modern electronic systems, which are strongly dominated by the extreme component density usually employed on PCBs and the associated increase in the interconnection density. The use of multi-layer structures with microstrips connected by various types of Vertical Interconnect Accesses (VIAs) calls for design strategies that reduce the impedance mismatch and signal attenuation. The paper proposes a thorough analysis of the effects associated with the VIA geometry and presents a parametric evaluation of them. The obtained results represent the starting point for a possible design procedure that manages the geometric aspects of differential VIAs, aiming to optimize their electrical performance while reducing their occupation of PCB area. The optimization technique considers a differential VIA as a four-port circuit whose characteristics are evaluated with suitable Figures of Merit (FoMs), thus striving for an optimal design obtained with closed-loop iterations. The analysis is performed in both the time (TDR: Time-Domain Reflectometry) and frequency domains (S and Z parameters), thus allowing a dramatic reduction in the number of cases to be analyzed. The procedure is thoroughly described and validated using simulation results.
Starting Page	475
e-ISSN	20799292
DOI	10.3390/electronics11030475
Journal	Electronics
Issue Number	3
Volume Number	11
Language	English
Publisher	MDPI
Publisher Date	2022-02-06
Access Restriction	Open
Subject Keyword	Electronics Information and Library Science Signal Integrity High-performance Pcb Pcb Interconnection Optimization Via Hole Design
Content Type	Text
Resource Type	Article

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