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| Content Provider | IET Digital Library |
|---|---|
| Author | Trong, Nha Quang Chiu, Huang Jen Lo, Yu Kang Lin, Chin Yu Alam, Mohammed Mahmood |
| Abstract | One drawback of the conventional current-fed full-bridge (CFFB) power factor correction (PFC) converters is extremely high-voltage spikes on metal oxide semiconductor field effect transistors (MOSFETs), which cause many problems such as high-voltage high-cost devices used, unreliability and burdensome magnetising components imposed. To overcome above shortcomings, a new isolated CFFB PFC converter featuring efficiency improvement, high input current quality and good common mode (CM) noise performance is proposed in this study. The voltage spikes are effectively eliminated by using a non-dissipative clamping structure resulting of no-loss consumption and low-voltage MOSFETs used. Additionally, to evaluate the conducted electromagnetic interference behaviour, the differential mode loop and CM loop models are also presented. Two testing hardware systems with 180–240 V input, 380 V/1 kW output of the conventional CFFB PFC and proposed PFC were built and inspected to compare their performances. The experimental results showed that the proposed topology completely eliminated the voltage spike on MOSFETs. The efficiency was largely improved by utilising of high-performance MOSFETs. In consequence, the experimental results reveal the preponderance of the proposed PFC converter to the previous researches on this topic. |
| Starting Page | 861 |
| Ending Page | 867 |
| Page Count | 7 |
| ISSN | 17554535 |
| Volume Number | 7 |
| e-ISSN | 17554543 |
| Issue Number | Issue 4, Apr (2014) |
| Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/iet-pel/7/4 |
| Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/10.1049/iet-pel.2013.0183 |
| Journal | IET Power Electronics |
| Publisher Date | 2013-10-30 |
| Access Restriction | Open |
| Rights Holder | © The Institution of Engineering and Technology |
| Subject Keyword | Bridge Circuit CM Loop Model CM Noise Performance Common Mode Noise Performance Conducted Electromagnetic Interference Behaviour Evaluation Differential Mode Loop Model Efflciency Improvement Electromagnetic Compatibility Electromagnetic Interference Extremely High-voltage Spikes High Input Current Quality High-performance MOSFET Insulated Gate Field Effect Transistors Interference Isolated CFFB PFC Converter Low-voltage MOSFET Low-voltage Stress Metal Oxide Semiconductor Fleld Effect Transistors Modified Current-fed Full-bridge Isolated Power Factor Correction Converter No-loss Consumption Nondissipative Clamping Structure Power 1 KW Power Converter Power Factor Correction Power MOSFET Power Semiconductor Device Power Supplies to Apparatus Voltage 180 V to 240 V Voltage 380 V Voltage Spike Elimination |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering |
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