NDLI: Minimisations of total harmonic distortion in cascaded transformers multilevel inverter by modifying turn ratios of the transformers and input voltage regulation

Content Provider	IET Digital Library
Author	Ajami, Ali Farakhor, Amir Ardi, Hossein
Abstract	A total harmonic distortion (THD) minimisation technique for cascaded transformers multilevel inverters is presented. In the proposed method, turn ratios of the transformers are optimised along with switching angles in order to minimise the THD of the inverter output voltage. Assuming turn ratios of the transformers as variables adds extra degrees of freedom to the equations. To obtain high-quality output voltage with an acceptable THD in lower modulation indices, the input voltage is also regulated. Genetic algorithm is applied to minimise THD as well as satisfy fundamental component of the output voltage. To verify the feasibility of the proposed approach, a nine-level cascaded transformer inverter prototype has been implemented. Simulation and experimental results show the effectiveness of the proposed technique in THD minimisation and generation of the desired fundamental component at output voltage.
Starting Page	2687
Ending Page	2694
Page Count	8
ISSN	17554535
Volume Number	7
e-ISSN	17554543
Issue Number	Issue 11, Nov (2014)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-pel/7/11
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-pel.2013.0533
Journal	IET Power Electronics
Publisher Date	2014-10-01
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Cascaded Transformers Multilevel Inverters Control of Electric Power System Degree of Freedom Invertors Modulation Index Nine-level Cascaded Transformer Inverter Prototype Power Transformer Switching Angles THD Minimisation Technique Total Harmonic Distortion Minimisation Technique Transformer And Reactors Turn Ratios Voltage Control Voltage Regulation
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Converter utilisation ratio assessment for total harmonic distortion optimisation in cascaded H-bridge multi-level inverters

Flexible transformer-based multilevel inverter topologies

Switching algorithm for single Z-source boost multilevel inverter with ability of voltage control

An efficient multilevel-synthesis approach and its application to a 27-level inverter

Multilevel inverter based on cascaded association of Buck EIE inverters

Transformer-based multilevel inverters: analysis, design and implementation

Modulation and control of multilevel inverter for an open-end winding induction motor with constant voltage levels and harmonics

Fundamental modulation strategy with selective harmonic elimination for multilevel inverters

Novel voltage balancing algorithm for single-phase cascaded multilevel inverter for post-module failure operation in solar photovoltaic applications

Minimisations of total harmonic distortion in cascaded transformers multilevel inverter by modifying turn ratios of the transformers and input voltage regulation

Similar Documents

Converter utilisation ratio assessment for total harmonic distortion optimisation in cascaded H-bridge multi-level inverters

Flexible transformer-based multilevel inverter topologies

Switching algorithm for single Z-source boost multilevel inverter with ability of voltage control

An efficient multilevel-synthesis approach and its application to a 27-level inverter

Multilevel inverter based on cascaded association of Buck EIE inverters

Transformer-based multilevel inverters: analysis, design and implementation

Modulation and control of multilevel inverter for an open-end winding induction motor with constant voltage levels and harmonics

Fundamental modulation strategy with selective harmonic elimination for multilevel inverters

Novel voltage balancing algorithm for single-phase cascaded multilevel inverter for post-module failure operation in solar photovoltaic applications

Minimisations of total harmonic distortion in cascaded transformers multilevel inverter by modifying turn ratios of the transformers and input voltage regulation