NDLI: Closed-form impedance model for annular through-silicon via pairs in three-dimensional integration

Content Provider	IET Digital Library
Author	Chen, Aobo Liang, Feng Wang, Gaofeng Wang, Bing Zhong
Abstract	Annular through-silicon via (TSV) is one of the promising solutions for vertical interconnects in three-dimensional integration, which diminishes mismatch effects of the coefficients of thermal expansion between two different materials and saves cost, as compared with other TSV structures. In this study, an analytical impedance model is proposed. Closed-form formulas for calculations of the per-unit-height resistances and inductances are derived by calculating the electromagnetic field quantities in the cylindrically multilayered media, via solving the longitudinal current densities in the conducting layers. Combining with the conventional admittance model, a compact transmission line model is obtained, which can be used to model the electrical properties of annular TSVs. These formulas appropriately capture the real current distribution because of skin effects in metal conductors as well as the eddy current loss in semiconductor regions. The results from these analytical formulas have comparable accuracy as those obtained by the full-wave solver in a wideband frequency range, yet much higher computational efficiency than existing modelling methods.
Starting Page	808
Ending Page	813
Page Count	6
ISSN	17518725
Volume Number	9
e-ISSN	17518733
Issue Number	Issue 8, Jun (2015)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-map/9/8
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-map.2014.0606
Journal	IET Microwaves, Antennas & Propagation
Publisher Date	2015-01-19
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Annular Through Silicon Via Pairs Closed Form Impedance Model Coefficient of Thermal Expansion Compact Transmission Line Model Conducting Layer Current Density Current Distribution Cylindrically Multilayered Media Eddy Current Loss Electromagnetic Field Quantities Integrated Circuit Interconnections Layout Longitudinal Current Densities Metal Conductor Metallisation And Interconnection Technology Modelling And Testing Semiconductor Integrated Circuit Design Semiconductor Region Skin Effect Thermal Expansion Three Dimensional Integration Three-dimensional Integrated Circuit Vertical Interconnect
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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