NDLI: Robustness-oriented P-band phased array radar front-end with high phase and gain resolution in 0.18 μm BiCMOS

Content Provider	IET Digital Library
Author	Wu, Wen Guang Fang, Yun Yu, Xiao Peng Sui, Wen Quan Chen, Jer Ming Yeo, Kiat Seng
Abstract	In this study, the authors present a P-band phased array front-end for radar applications, implemented using a 0.18 μ m SiGe BiCMOS process, thereby enhancing robustness over process-voltage-temperature (PVT) variations. It comprises a low noise amplifier, 6-bit attenuator, 6-bit phase shifter, power amplifier, T-R switches as well as control circuits. As the key here is to achieve high resolutions in both gain and phase controls, the 6-bit attenuator and 6-bit phase shifter are optimised by cascading unit cells with different topologies, hence ensuring a good balance between accuracy, silicon area and robustness. Temperature compensation techniques are also used in the low noise amplifier and power amplifier so that the circuit works robustly against PVT variations. Fabricated using TowerJazz 0.18 μ m SiGe BiCMOS technology, the prototype front-end occupies a chip area of 5 × 2.5 mm 2 , including bonding pads and test buffers. It performs with a receiver (RX) gain of 12 dB, a 3 dB noise figure, and a transmitter (TX) gain of 29 dB, while consuming 60 mW (RX mode) and 600 mW (TX mode) from a 3.3 V supply voltage. The chip is also measured in extreme conditions (e.g. temperatures exceeding 100 ° C ) to ensure robust operation and is suitable for low-cost phased array systems.
Starting Page	960
Ending Page	966
Page Count	7
ISSN	17518725
Volume Number	14
e-ISSN	17518733
Issue Number	Issue 9, Jul (2020)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-map/14/9
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-map.2019.0792
Journal	IET Microwaves, Antennas & Propagation
Publisher Date	2020-04-21
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	6-bit Attenuator Amplifiers Analogue Circuit Attenuators BiCMOS Integrated Circuit Control Circuit Filter And Other Network Gain 12.0 DB Gain 29.0 DB Ge-Si Alloy III-V SemiConductor Low Noise Amplifier Mixed Technology Integrated Circuit Noise Figure 3.0 DB Phase Control Phase Shifter Phased Array Radar Power 60.0 MW Power 600.0 MW Power Amplifier Process-voltage-temperature Variations Prototype Front-end PVT Variations Radar Application Radar Equipment Receiver Gain Robustness-oriented P-band Phased Array Radar Front-end SiGe SiGe BiCMOS Technology System And Application Temperature 100.0 DegC Temperature Compensation Technique Transmitter Gain Voltage 3.3 V Word Length 6 Bit
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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