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Content Provider | IET Digital Library |
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Author | Zhang, Jian Zhang, Yue Chen, Zengping Lin, Qianqiang |
Abstract | The wideband radar intermediate frequency direct acquisition module is used to acquire, process and transmit data, which is an important part of radar system. Based on the current advanced Virtex-7 FPGA board and high-speed ADC card, this article designs the module from two aspects of hardware design and hardware development, including structure design, data flow design, and FPGA top-level design. Then the article researches on some key technologies involved, including JESD204B protocol configuration, data flow transmission, DDR3 buffer design and clock optimisation. Practice has proved that the design of this article can accomplish the task well in practical engineering. |
Starting Page | 6331 |
Ending Page | 6335 |
Page Count | 5 |
Volume Number | 2019 |
e-ISSN | 20513305 |
Issue Number | Issue 19, Oct (2019) |
Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/joe/2019/19 |
Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/10.1049/joe.2019.0233 |
Journal | The Journal of Engineering |
Publisher | The Institution of Engineering and Technology |
Publisher Date | 2019-05-30 |
Access Restriction | Open |
Rights License | Creative Commons Attribution-Non Commercial-No Derivs License (http://creativecommons.org/licenses/by-nc-nd/3.0/) |
Subject Keyword | A/D And D/A Convertor Analogue-Digital Conversion Buffer Circuit Clock Optimisation Clocks Data Acquisition Data Acquisition System Data Flow Design DDR3 Buffer Design Digital Circuit Design, Modelling And Testing Field Programmable Gate Array FPGA Top-level Design Hardware Design High-speed ADC Card Integrated Circuit Design JESD204B Protocol Configuration Logic Circuit Protocol Radar Equipment Radar System Structure Design System And Application Virtex-7 Series FPGA Wideband Radar Intermediate Frequency Direct Acquisition Module |
Content Type | Text |
Resource Type | Article |
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