NDLI: Hardware efficient multiplier-less multi-level 2D DWT architecture without off-chip RAM

Content Provider	IET Digital Library
Author	Wu, Changkun Zhang, Wei Jia, Qi Liu, Yanyan
Abstract	This study presents a multi-level 2D discrete wavelet transform (DWT) architecture without off-chip RAM. Existing architectures use one off-chip RAM to store the image data, which increases the complexity of the system. For one-chip design, line-based architecture based on modified lifting scheme is proposed. By replacing the multipliers with canonic sign digit multipliers, a critical path of one full-adder delay is achieved. As per theoretical estimate, for three-level 2D DWT with an image of N × N size, the proposed architecture requires 123 adders, 66 subtracters, 167 registers, temporal memory of 7.5N words and input RAM of 3N bytes. The estimated hardware requirement shows that for the image size of 512 × 512 and three-level DWT, the proposed architecture involves at least 14.1% less transistor-delay-product than existing architectures.
Starting Page	362
Ending Page	369
Page Count	8
ISSN	17519659
Volume Number	11
e-ISSN	17519667
Issue Number	Issue 6, Jun (2017)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-ipr/11/6
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-ipr.2016.0695
Journal	IET Image Processing
Publisher Date	2017-02-15
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Canonic Sign Digit Multipliers Digital Circuit Design, Modelling And Testing Discrete Wavelet Transform Full-adder Delay Hardware Efficient Multiplier Less Multilevel 2D DWT Architecture Hardware Requirement Image Data Integral Transforms Integrated Circuit Design Lifting Scheme Line Based Architecture Memory Circuit Off-chip Ram One-chip Design Random-access Storage Semiconductor Storage Temporal Memory Transistor Delay Product
Content Type	Text
Resource Type	Article
Subject	Signal Processing Electrical and Electronic Engineering Computer Vision and Pattern Recognition Software

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