NDLI: Multiplicative composition of clock-skew components for improving time synchronisation

Content Provider	IET Digital Library
Author	Secilla, J. M. Castillo León, F. Olivares, J. Palomares, J. M.
Abstract	Time synchronisation is essential to ensure the reliability of distributed computation. Oscillators included in low-cost nodes are highly influenced by temperature variations. Experimental results demonstrate that the clock skew of two nodes (the ratio of the real frequencies of the oscillators) is composed of a multiplicative combination of, at least, two main components: the clock skew due to the variations between the cut of the crystal of each oscillator and the clock skew due to the different temperatures affecting the nodes. By applying a nonlinear filtering, homomorphic filtering, both components are separated in an effective way. Applying a correction factor to the clock skew due to the cut of the crystals, the temperature variations are compensated very accurately. The proposed new approach is called HF2 (homomorphic improved filtering) and can be easily applied to any clock-skew-based time synchronisation protocol. The correction factor has been applied to flooding time synchronisation protocol (FTSP) resulting in HF2-FTSP. An experiment with temperature variation, comparing FTSP, A2T-FTSP and HF2-FTSP is shown. The proposed technique allows the use of cheap and simple oscillators for achieving a quite similar accurate synchronisation level than much more expensive and precise oscillators.
Starting Page	991
Ending Page	993
Page Count	3
ISSN	00135194
Volume Number	51
e-ISSN	1350911X
Issue Number	Issue 13, Jun (2015)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/el/51/13
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/el.2015.0476
Journal	Electronics Letters
Publisher Date	2015-06-04
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Circuit For Digital Computers Clock Skew Component Clocks Correction Factor Digital Circuit Distributed Computation Filter And Other Network Filtering Method in Signal Processing FTSP Homomorphic Filtering Homomorphic Improved Filtering Low Cost Node Multiplicative Composition Nonlinear Filter Nonlinear Filtering Nonlinear Network Analysis And Design Oscillator Precise Oscillator Reliability Signal Processing Theory Synchronisation Synchronisation Level Temperature Variations Time Synchronisation Protocol
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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