NDLI: Low-cost multi-standard video transform core using time-distribution scheme

Content Provider	IET Digital Library
Author	Chen, Y. H. Tseng, Y. H.
Abstract	Cost-effective two-dimensional (2D) discrete cosine transform (DCT) and inverse DCT architectures capable of supporting multiple standards of MPEG, H.264 and VC-1 are presented. The proposed core utilises a 1D core and a transposed memory to achieve a low cost design. Multi-level factor share is implemented in conjunction with distributed arithmetic in a system to enable the sharing of the coefficient matrix circuit in order to reduce hardware costs. The proposed approach employs a time-distribution scheme to enable the simultaneous processing of the first and second dimensions to enhance throughput. A high efficiency of this approach was verified by fabricating a test chip using the TSMC 0.18 μm CMOS process. The architecture has an operating frequency of 200 MHz, and throughput of 800 M-pixels/s with a gate count of 44.5 K.
Starting Page	1980
Ending Page	1982
Page Count	3
ISSN	00135194
Volume Number	52
e-ISSN	1350911X
Issue Number	Issue 24, Nov (2016)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/el/52/24
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/el.2016.3491
Journal	Electronics Letters
Publisher Date	2016-11-04
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	CMOS Integrated Circuit Coefficient Matrix Circuit Cost-effective Two-dimensional Discrete Cosine Transform Digital Arithmetic Method Digital Circuit Design, Modelling And Testing Discrete Cosine Transform Distributed Arithmetic Frequency 200 MHz H.264 Standard Hardware Cost Image And Video Coding Integral Transforms in Numerical Analysis Inverse DCT Architectures Inverse Transforms Low Cost Design Low-cost Multistandard Video Transform Core MPEG Standard Multilevel Factor Share Size 0.18 Mum Time Distribution Scheme Transposed Memory TSMC CMOS Process VC-1 Standard Video Coding Video Signal Processing
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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