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Proceedings. 2005 IEEE International Workshop on Current and Defect Based Testing, 2005. DBT 2005.

Proceedings. 2004 IEEE International Workshop on Current and Defect Based Testing (IEEE Cat. No.04EX1004)

Proceedings. 2004 IEEE International Workshop on Current and Defect Based Testing (IEEE Cat. No.04EX1004)

Table of contents

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Program Committee

Built-in current sensor for IDDQ test

An improved method for i/sub DDT/ testing in the presence of leakage and process variation

Comparison of wafer-level spatial I/sub DDQ/ estimation methods: NNR versus NCR

Calibrating power supply signal measurements for process and probe card variations

Doing more with less: a recipe for rapid IDDQ development

Mixed-signal LSI relationship among measurement accuracy, yield, and test time

On the effectiveness of detecting small delay defects in the slack interval

On the potential of flush delay for characterization and test optimization

At-speed test for path delay faults using practical techniques

Delay testing based on transition faults propagated to all reachable outputs

On correlating structural tests with functional tests for speed binning

Fault diagnosis of a GHz CMOS LNA using high-speed ADC-based BIST

Automatic test pattern generation for resistive bridging faults

A memory built-in self-diagnosis design with syndrome compression

Test volume reduction via flip-flop compatibility analysis for balanced parallel scan

"ITRS test challenges need defect based test: fact or fiction?"

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