NDLI: Heterogeneous and Hybrid Clustered Topology for Networks-on-Chip

Content Provider	IEEE Xplore Digital Library
Author	Johari, S. Kumar, A. Sehgal, V.K.
Copyright Year	2015
Description	Author affiliation: Dept. of CSE & IT, Jaypee Univ. of Inf. Technol., Solan, India (Johari, S.; Kumar, A.; Sehgal, V.K.)
Abstract	Reduction in the latency (end-to-end latency and network latency), loss probability, energy consumption and response time are the basic parameters, which are considered by the researchers for the optimization of the networks-on-chip topologies. Different cores communicate at different rates with each other. Some cores communicate at a very rapid rate whereas some rarely communicate to each other. Considering the communication between the cores as the basic parameter, the aim of the paper is to modify the mesh topology and generate a heterogeneous and hybrid clustered topology (HHCT) based on communication between the cores. In the proposed approach, the optimization of latency and response time are major concern, while keeping the geometry of the proposed topology same as that of mesh topology, such that the area required by the topology is constant.
Starting Page	183
Ending Page	187
File Size	373614
Page Count	5
File Format	PDF
e-ISBN	9781467370165
DOI	10.1109/CICSyN.2015.41
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-06-03
Publisher Place	Latvia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Geometry Algorithm design and analysis Energy consumption Network topology Bandwidth clustered topology Topology heterogeneous topology Time factors Networks-on-chip Core communication graph
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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