NDLI: Investigating Flash memory wear levelling and execution modes

Content Provider	IEEE Xplore Digital Library
Author	Harrison, P.G. Zertal, S.
Copyright Year	2009
Description	Author affiliation: University of Versailles, France (Harrison, P.G.) \|\| Imperial College London, UK (Zertal, S.)
Abstract	The impact of wear levelling on a Flash storage package and its access operations' execution modes is investigated. Simple, static logical to physical mapping functions are proposed and their implied wear levelling is assessed for different address distributions, covering both unifrom access and hot spots, as well as the Flash chip utilisation within the whole package. For the access execution modes, different preemptive and non-preemptive priority schemes are considered with a range of IO arrival rates using Poisson, Erlang and Pareto-based arrival processes. The analysis of the impact of the execution modes on the performance of the Flash memory is undertaken using a hardware simulator. The results obtained show clearly the good wear levelling obtained by the mapping functions, even in presence of hot spots and the effect of the chosen execution mode on the whole storage package for each IO workload type.
Starting Page	81
Ending Page	88
File Size	739197
Page Count	8
File Format	PDF
ISBN	9781424441655
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-07-13
Publisher Place	Turkey
Access Restriction	Subscribed
Rights Holder	SCS
Subject Keyword	Wear levelling Preemption Priority Educational institutions Scheduling Application software Waiting time Information analysis Analytical models Chips utilisation Flash memory Packaging Hard disks Hardware Performance analysis
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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