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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Wei Xu Xiangning Xiao Jinmeng Chen |
| Copyright Year | 2010 |
| Description | Author affiliation: North China Electric Power University, Beijing 102206, China (Xiangning Xiao) || HVDC Division, Beijing Sifang Automation Co., Ltd, 100085, China (Wei Xu) || Dept. Manufacturing Supervision, State Grid International Development Ltd, Beijing 100120, China (Jinmeng Chen) |
| Abstract | Static Synchronous Series Compensator(SSSC)which is regarded as a newly developed FACTS equipment with extensive applying prospects has received more and more attentions recently. This paper has adopted three single phase of cascaded converter as the main circuit of SSSC and SVPWM based on KL coordinates as the modulation algorithm. Considering the characteristics of main circuit structure and SSSC function,a method was proposed to control cascaded converter by DSP+FPGA aiming at supplying enough PWM pulses because there are many switch components in multi-level converter. The present paper introduced the functional module configuration of the whole closed loop control system from two aspects of hardware platform design and software control algorithms realization. Finally in the present paper the SSSC controller were testified to be effective by simulation results in which the external electric power system and the main circuit of SSSC converter were simulated in RTDS while the controller adopted the hardware connection method of DSP+FPGA. |
| Starting Page | 1 |
| Ending Page | 7 |
| File Size | 2135665 |
| Page Count | 7 |
| File Format | |
| ISBN | 9781457700668 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2010-09-13 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Chinese Soc for Elec Eng |
| Subject Keyword | Space vector pulse width modulation DSP multi-level SVPWM Capacitors FPGA SSSC Digital signal processing Switches RTDS Converters H-bridge cascade Field programmable gate arrays |
| Content Type | Text |
| Resource Type | Article |
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