NDLI: Policies for fault-tolerance through mixed space- and time-redundancy in semi-systolic FFT arrays

Content Provider	IEEE Xplore Digital Library
Author	Antola, A. Negrini, R. Sami, M.G. Scarabottolo, N.
Copyright Year	1988
Description	Author affiliation: Dept. of Electron., Politecnico di Melano, Italy (Antola, A.; Negrini, R.; Sami, M.G.; Scarabottolo, N.)
Abstract	Fault-tolerance in semisystolic FFT (fast Fourier transform) arrays is considered, with the primary aim of obtaining either end-of-production restructuring or offline reconfiguration at run-time. A mixed-mode solution is proposed, limiting the amount of structure redundancy, keeping intact nominal processing speed, more complex fault distributions require use of time-redundancy, whereby nominal speed decreases but processing power is kept unchanged. The modified architecture granting such performances is presented, and the percentage of survival to faults thus achieved is evaluated. Reliability is assessed by evaluation of the weighted probability of survival for the fault-tolerant structure related to the number of present faults.<>
Starting Page	565
Ending Page	576
File Size	368889
Page Count	12
File Format	PDF
ISBN	0818688602
DOI	10.1109/ARRAYS.1988.18093
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1988-05-25
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Degradation Performance evaluation Fault tolerance Runtime Redundancy Integrated circuit interconnections Production Silicon Error correction Circuit faults
Content Type	Text
Resource Type	Article

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