NDLI: Enhanced gain bandwidth and loss compensated cascaded single-stage CMOS distributed amplifier

Content Provider	IEEE Xplore Digital Library
Author	Tarar, M. Muh-Dey Wei Reckmann, M. Negra, R.
Copyright Year	2015
Description	Author affiliation: Dept. of High-Freq. Electron., RWTH Aachen Univ., Aachen, Germany (Tarar, M.; Muh-Dey Wei; Reckmann, M.; Negra, R.)
Abstract	This work presents a loss compensated cascaded single-stage distributed amplifier (CSSDA) in commercial 65nm CMOS technology. The CSSDA is composed of three distributed stages connected in a cascade configuration to target high gain. The idle interstage drain terminations are omitted because of multiplicative gain mechanism. High gain is maintained over very large bandwidth through the inductive-peaking technique. Further, the CSSDA single cell is modified by a loss compensation technique to remove the high frequency losses of the artificial transmission lines which shows a significant enhancement in gain bandwidth (GBW) product. The simulation results show a GBW of 540GHz for the loss compensated CSSDA (LC-CSSDA) which is significantly higher than GBW of 350 GHz for a conventional CSSDA. The 2-stage (LC-CSSDA) shows a GBW of 835GHz which is almost twice the GBW (426 GHz) of a conventional 2-stage CSSDA.
Starting Page	335
Ending Page	338
File Size	204483
Page Count	4
File Format	PDF
ISBN	9783981266863
DOI	10.1109/GEMIC.2015.7107822
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-03-16
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	IMA: IMATech e.V.
Subject Keyword	Power transmission lines Bandwidth Logic gates Propagation losses Topology Inductors Gain
Content Type	Text
Resource Type	Article

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