NDLI: Enhancing the performance and fairness of shared DRAM systems with sharing-aware scheduling

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2010 2nd International Conference on Computer Engineering and Technology

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2009 International Conference on Computer Engineering and Technology

Enhancing the performance and fairness of shared DRAM systems with sharing-aware scheduling

Content Provider	IEEE Xplore Digital Library
Author	De-Li Wang De-Yuan Gao Dang-Hui Wang
Copyright Year	2010
Description	Author affiliation: College of Computer Science, Northwestern Polytechnical University Xi'an, China (De-Li Wang; De-Yuan Gao; Dang-Hui Wang)
Abstract	CMP (chip multiprocessor) is simply getting more ubiquitous these days. Most of the processors used in servers, desktop and even in embedded applications are featuring several cores. And it is predicted that chips with many more cores will become widespread in the near future. As cores on the same chip share the DRAM memory system, multiple threads executing simultaneously will interfere with each other's memory requests. While recent studies have focused a lot on the multi-programmed applications, less work is done in the single multi-threaded domain. In this paper, we examine polices for managing the fairness of off-chip memory bandwidth among different threads in parallel applications. First, we show that there are also fairness problems existing between different threads from the same parallel program. Then we find one cause to this is that the shared data memory accesses are not explicitly classified. Based on this observation, we propose a sharing-aware DRAM scheduler design that provides fair service to different threads in parallel programs. Experimental results show that this scheme can effectively improve the fairness among different threads and also improve the performance of whole system.
File Size	151718
File Format	PDF
ISBN	9781424463473
e-ISBN	9781424463497
DOI	10.1109/ICCET.2010.5485958
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-04-16
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	fairness Processor scheduling Random access memory Bandwidth Interference CMP DRAM Application software System-on-a-chip parallel program sharing-aware Delay
Content Type	Text
Resource Type	Article

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