NDLI: An asynchronous low-power innovative network-On-chip including design-for-test capabilities

Content Provider	IEEE Xplore Digital Library
Author	Thonnart, Y. Xuan-Tu Tran Vivet, P. Beigne, E. Clermidy, F. Durupt, J.
Copyright Year	2009
Description	Author affiliation: VNU-Coltech / SIS laboratory - 144 Xuan Thuy Road, 10 000 Hanoi, Vietnam (Xuan-Tu Tran) \|\| CEA-LETI, MINATEC - 17 rue des Martyrs, 38 054 Grenoble, France (Thonnart, Y.; Vivet, P.; Beigne, E.; Clermidy, F.; Durupt, J.)
Abstract	The demands of scalable, low latency and power efficient System-On-Chip interconnect cannot be satisfied only by point-to-point or shared-bus interconnects. By providing more bandwidth at reasonable power consumption, new communication infrastructures like NoCs seem promising, but are still limited by implementation issues. We present in this paper an Asynchronous Network-on- Chip architecture with two main innovations. Firstly, an automatic power regulation scheme is proposed to dynamically save leakage and dynamic power consumption. Secondly, due to the current lack of testing methodology for asynchronous logic, we propose a novel DfT solution to allow acceptance of the asynchronous NoC. The proposed architecture has been fully implemented in a STMicroelectronics CMOS 65nm technology, integrated in a complex test-chip and fabricated.
Starting Page	59
Ending Page	62
File Size	1042191
Page Count	4
File Format	PDF
ISBN	9781424451395
DOI	10.1109/ATC.2009.5349340
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-10-12
Publisher Place	Vietnam
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Energy consumption Technological innovation Network-on-a-chip Power system interconnection Bandwidth CMOS technology Design for testability System-on-a-chip Logic testing Delay
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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