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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Madariaga, A. Jiménez, J. Martín, J.L. Bidarte, U. Zuloaga, A. |
| Copyright Year | 2010 |
| Description | Author affiliation: Applied Electronics Research Team (APERT) - University of the Basque Country Faculty of Engineering / Bilbao (Spain) (Madariaga, A.; Jiménez, J.; Martín, J.L.; Bidarte, U.; Zuloaga, A.) |
| Abstract | Increasing the level of abstraction while designing electronic complex systems is one of the main challenges that electronic design teams are facing nowadays. This challenge is closely related to the development of virtual models of components and devices with four main objectives: 1) early software development; 2) architectural exploration; 3) High-Level Synthesis (HLS); 4) Verification through different abstraction levels. Therefore, adopting new methodologies and Electronic Design Automation (EDA) tools in the design flow is becoming mainstream. On the one hand, this paper analyzes the role that the SystemC™ and the Transaction Level Modelling (TLM) standards are playing in this change in methodology. An up-to-date list of the EDA tools for HLS is also presented. Some of the listed HLS tools are analyzed searching for the innovations present in the latest versions. Finally, conclusions are presented as a summary and future work is commented on. |
| Starting Page | 1 |
| Ending Page | 6 |
| File Size | 392864 |
| Page Count | 6 |
| File Format | |
| ISBN | 9788070438657 |
| ISSN | 18037232 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2010-09-08 |
| Publisher Place | Czech Republic |
| Access Restriction | Subscribed |
| Rights Holder | Univer of Western Bohemia |
| Subject Keyword | Application specific integrated circuits Accuracy Software Hardware Hardware design languages Field programmable gate arrays Consumer electronics |
| Content Type | Text |
| Resource Type | Article |
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