NDLI: Temporal decoupling with error-bounded predictive quantum control

Content Provider	IEEE Xplore Digital Library
Author	Glaser, G. Nitsche, G. Hennig, E.
Copyright Year	2015
Description	Author affiliation: Reutlingen Univ., Reutlingen, Germany (Hennig, E.) \|\| IMMS Inst. fur Mikroelektronikund Mechatronik-Syst. gemeinnutzige GmbH Ilmenau, Ilmenau, Germany (Glaser, G.) \|\| Inst. fur Inf., OFFIS, Oldenburg, Germany (Nitsche, G.)
Abstract	Virtual prototyping of integrated mixed-signal smart-sensor systems requires high-performance co-simulation of analog frontend circuitry with complex digital controller hardware and embedded real-time software. We use SystemC/TLM 2.0 in combination with a cycle-count accurate temporal decoupling approach to simulate digital components and firmware code execution at high speed while preserving clock cycle accuracy and, thus, real-time behavior at time quantum boundaries. Optimal time quanta ensuring real-time capability can be calculated and set automatically during simulation if the simulation engine has access to exact timing information about upcoming communication events. These methods fail in case of non-deterministic, asynchronous events resulting in a possibly invalid simulation result. In this paper, we propose an extension of this method to the case of asynchronous events generated by blackbox sources from which a-priori event timing information is not available, such as coupled analog simulators or hardware in the loop. Additional event processing latency and/or rollback effort caused by temporal decoupling is minimized by calculating optimal time quanta dynamically in a SystemC model using a linear prediction scheme. For an example smart-sensor system model, we show that quasi-periodic events that trigger activities in temporally decoupled processes are handled accurately after the predictor has settled.
Starting Page	1
Ending Page	6
File Size	568103
Page Count	6
File Format	PDF
e-ISBN	9781467377355
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-09-14
Publisher Place	Spain
Access Restriction	Subscribed
Rights Holder	ECSI
Subject Keyword	Microcontrollers Simulation Stochastic processes Signal processing algorithms Predictive models Synchronization
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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