NDLI: Representing mapping and scheduling decisions within dataflow graphs

Content Provider	IEEE Xplore Digital Library
Author	Zebelein, Christian Haubelt, Christian Falk, Joachim Schwarzer, Tobias Teich, Jurgen
Copyright Year	2013
Description	Author affiliation: University of Rostock (Zebelein, Christian; Haubelt, Christian) \|\| University of Erlangen-Nuremberg (Falk, Joachim; Schwarzer, Tobias; Teich, Jurgen)
Abstract	Choosing the right programming model for multiprocessor System-on-Chip (MPSoC) platforms is a challenging task: in order to provide for automatic hardware/software synthesis in a model-based design flow, the system model should be architecture-independent on the one hand, but should also allow the back-annotation of architecture-dependent mapping and scheduling decisions on the other hand. Here, architecture-independent dataflow models are particularly suitable. In a dataflow model, concurrent processes (actors) communicate via packets transmitted over channels. However, the back-annotation process is difficult, and previous approaches are either restricted to static dataflow actors or static schedules. Also, the semantics of the underlying dataflow actors are often different from the semantics of the scheduling mechanism, which limits the compositionality of the dataflow model. In this paper, we propose a modeling approach which unifies the representation of dataflow actors and scheduling mechanisms, while also providing for both, dynamic dataflow actors and dynamic scheduling decisions. We describe how various scheduling schemes can be represented by our approach, and show the applicability of the proposed approach by means of synthetic dataflow graphs.
Starting Page	1
Ending Page	8
File Size	425391
Page Count	8
File Format	PDF
ISBN	9782953050486
ISSN	16369874
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-09-24
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	European Electronic Chips & Systems design Initiative - ECSI
Subject Keyword	Availability Schedules Runtime Semantics Ports (Computers) Dynamic scheduling
Content Type	Text
Resource Type	Article

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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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