NDLI: Automated Phase-Ordering of Loop Optimizations Based on Polyhedron Model

Content Provider	IEEE Xplore Digital Library
Author	Yunzhi Xue Chen Zhao
Copyright Year	2008
Description	Author affiliation: Inst. of Software, Chinese Acad. of Sci., Beijing (Yunzhi Xue; Chen Zhao)
Abstract	Computer architectural complexity is growing so dramatically that auto-tuning application's performance becomes an important approach to take full advantage of hardware's computational potential. In this paper we present a polyhedron model based approach to improve program performance by automatically finding a good sequence of loop optimizations for each program respectively. This approach performs any legal sequence of loop optimizations outside existing compilers based on polyhedral model for program or its part. It evaluates program performance using hardware performance counters and a simplified cache miss equation. It finally produces a sequence to perform loop optimization for a program, or different sequences for different parts of a program. Experiments for SPEC CPU 2006 show that LI data cache miss rate can be decreased by 5%-21% while performance improved by up to 26% when compared with Open64 -03.
Starting Page	672
Ending Page	677
File Size	210409
Page Count	6
File Format	PDF
ISBN	9780769533520
DOI	10.1109/HPCC.2008.133
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-09-25
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Schedules performance counters Radiation detectors CMES Phase-ordering of loop transformations Vectors Hardware Arrays Mathematical model Optimization
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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