NDLI: An optimized phased-array antenna for intra-chip communications

Content Provider	IEEE Xplore Digital Library
Author	Tavakoli, E. Tabandeh, M. Kaffash, S.
Copyright Year	2011
Description	Author affiliation: Department of Electrical Engineering, Sharif University of Technology, Tehran, Iran (Tavakoli, E.; Tabandeh, M.) \|\| Department of Electrical Engineering, K.N. Toosi University of Technology, Tehran, Iran (Kaffash, S.)
Abstract	The continued migration to smaller nanometer geometries brought fundamental limits to traditional on-chip hard wires performance. According to the International Technology Roadmap for Semiconductor (ITRS), feature size shrinking leads an increase in the operating frequency of RFCMOS devices. Thus, new interconnect methodologies such as radio frequency (RF) wireless can be employed on future chips projected for intra-chip wireless data communications. The size of Si integrated antenna in these frequencies will be several millimetres and the antenna length will be decrease by frequency increasing. In this paper, we have proposed an optimum radiation pattern achieved by a phased array (PA) antenna for wireless Network-on-Chip applications. We compare our PA characteristics to basic linear dipole antenna. Using CST Microwave Studio for simulation, a high transmission gain of −37.4 dB at 20 GHz is achievable from the pair of PA antennas at a separation of 6.25 mm on a high resistive silicon substrate which is at least 20 dB better than the dipole pair.
Starting Page	1
Ending Page	4
File Size	837777
Page Count	4
File Format	PDF
ISBN	9781457710148
e-ISBN	9781457710162
e-ISBN	9781457710155
DOI	10.1109/LAPC.2011.6114035
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-11-14
Publisher Place	United Kingdom
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Wireless communication Dipole antennas Transmitting antennas System-on-a-chip Gain Antenna radiation patterns
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in