NDLI: Data path refinement algorithm in high-level synthesis based on dynamic programming

Content Provider	IEEE Xplore Digital Library
Author	Rahimi, A. Mohammadi, S. Foroughi, A.
Copyright Year	2009
Description	Author affiliation: School of Electrical and Computer Engineering, University of Tehran, Iran (Rahimi, A.; Mohammadi, S.; Foroughi, A.)
Abstract	As CMOS technology scales down into the deep-submicron domain, the cost of design, complexity and customization for Systems-On-Chip (SoCs) is rapidly increasing due to the inefficiency of traditional CAD tools. In this paper we present a new interactive refinement algorithm in high-level synthesis, based on dynamic programming, which maximizes resource optimization in data path. We start by quantifying the properties of the given application C code in terms of control data flow graph (CDFG), available parallelism and other metrics. We then apply designer guided constraints to a data path refinement algorithm for an initial data path. It attempts to reduce the number of the most expensive components while meeting the constraints. The experimental results show that not only the refined data path outperforms data paths refined by other heuristic methods, but also presents lower cost, less overhead and can be generated in less time.
Starting Page	145
Ending Page	149
File Size	382768
Page Count	5
File Format	PDF
ISBN	9781424456987
e-ISBN	9781424457007
DOI	10.1109/IIT.2009.5413775
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-12-15
Publisher Place	United Arab Emirates
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Algorithm design and analysis Concurrent computing Design engineering Costs Design automation CMOS technology Data engineering Scheduling High level synthesis Dynamic programming
Content Type	Text
Resource Type	Article

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