NDLI: Exploiting dataflows and Petri nets mappings

Content Provider	IEEE Xplore Digital Library
Author	Rocha, J.-I. Pascoa Dias, O. Gomes, L.
Copyright Year	2013
Description	Author affiliation: Escola Super. de Tecnol. de Setubal, Setubal, Portugal (Rocha, J.-I.; Pascoa Dias, O.) \|\| Fac. de Cienc. e Tecnol., Univ. Nova de Lisboa, Lisbon, Portugal (Gomes, L.)
Abstract	Dataflow and Petri nets are used in modeling and analyzing streaming applications, which execute indefinitely using limited resources. Therefore it is essential to know if a system model guaranties certain properties, namely, liveness, boundedness or the maximal throughput. Besides, working with hardware/ software co-design techniques helps to define architecture and platform mapping, accommodating static and dynamically reconfigurable components. Over the last two decades a multitude of dataflow domains emerged along with the specificity of the outlined model of computation, in particular the Synchronous Dataflows, which have proved their adequacy in data-dominated systems, and it is nowadays a mature model of computation. This paper describes a set of translating rules allowing the mapping from Synchronous Dataflows into Petri nets. Study on invariants is presented. Signal processing application examples are used, illustrating the effectiveness of Petri net based modeling strategies to optimize digital system design, identifying a schedule that minimizes the amount of storage resource thus improving the systems' power consumption. The proposed approach allows one to know in advance at design stage the maximum potential and effective amount of storage resource at any signal processing system.
Starting Page	590
Ending Page	595
File Size	1819141
Page Count	6
File Format	PDF
ISBN	9781479907526
DOI	10.1109/INDIN.2013.6622950
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-07-29
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Analytical models Schedules Petri nets Modems Threshold voltage Mathematical model Equations
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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