NDLI: Beta test analysis of WIPL-DP

Content Provider	IEEE Xplore Digital Library
Author	Tabet, S.N. Card, C.
Copyright Year	2005
Description	Author affiliation: NAVAIR, Patuxent River, MD, USA (Tabet, S.N.)
Abstract	During the Beta Test (BT) phase, WIPL-D [B.M. Kolundzija et al., 2000] was parallelized for matrix fill/solution, to supplement the frequency parallelization developed in the Alpha Test (AT) phase [S. Tabet et al. April 2004]. The new WIPL-DP code was required to run on three distinct HPC platforms. The BT phase was the final testing phase of WIPL-DP5 since the IOT&E was eliminated from the requirements. WIPL-DP was successfully parallelized for frequency and matrix fill/solution. The revised code received threshold level (or better) performance rating for all critical technical parameters (CTPs) tested. The chosen test case for the BT phase was a further modification to the version used in the AT phase of the "human head adjacent to a cellular phone" (DEMO-531) problem. This WIPL-DP effort was funded under the common high performance computing software support initiative (CHSSI) as described in S. Tabet et al. (2004). The goal of this initiative was to provide efficient, scalable, portable software codes, algorithms, tools, models and simulations that can run on a variety of DOD high performance computing platforms that can be used by scientists and engineers to solve computing problems.
Starting Page	106
Ending Page	109
File Size	182515
Page Count	4
File Format	PDF
ISBN	0780390687
DOI	10.1109/WCACEM.2005.1469540
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-04-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	ACES
Subject Keyword	High performance computing Cellular phones Computational modeling Software algorithms Humans Software performance Frequency US Department of Defense Software tools Testing
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Automated TPS rehost software

A Common Computational Science Environment for High Performance Computing Centers

Beta Test Analysis of WIPL-DP

Software Process for Rapid Development of HPC Software Using CMake

Modeling and simulation

Recent Successes and Changes of the HPCMP Sustained Systems Performance Test

Implementation of the Joint Analysis System on TOW to Enhance DoD Analysis Performance

Efficient parallel computational environment to perform electromagnetic simulations

Defense Applications

Beta test analysis of WIPL-DP

Similar Documents

Automated TPS rehost software

A Common Computational Science Environment for High Performance Computing Centers

Beta Test Analysis of WIPL-DP

Software Process for Rapid Development of HPC Software Using CMake

Modeling and simulation

Recent Successes and Changes of the HPCMP Sustained Systems Performance Test

Implementation of the Joint Analysis System on TOW to Enhance DoD Analysis Performance

Efficient parallel computational environment to perform electromagnetic simulations

Defense Applications

Beta test analysis of WIPL-DP