NDLI: Seed graph expansion for construction of structured LDPC codes

Content Provider	IEEE Xplore Digital Library
Author	Sulek, W.
Copyright Year	2009
Description	Author affiliation: Institute of Electronics, Faculty of Automatic Control, Electronics and Computer Science, Silesian University of Technology, Akademicka 16, 44-100 Gliwice, Poland (Sulek, W.)
Abstract	A lot of works concerning LDPC codes construction has been published so far. However, it is well known that efficient partially parallel hardware decoder architectures are allowed only for LDPC codes with blockwise partitioned structure of the parity check matrix, called structured LDPC codes. Two main steps in the structured LDPC code parity check matrix construction are the seed matrix (seed graph) construction and expansion of the seed matrix (seed graph). In this paper we present a flexible method for seed matrix expansion by computer search technique for the optimum shift values of the circulant submatrices. The proposed algorithm aims at reducing existence in the code graph of small cycles with low external connectivity that constitute structures known as Stopping Sets and Trapping Sets that are harmful to the code performance, especially in the high SNR region. The algorithm can be used for regular or irregular code construction of any block length and code rate.
Starting Page	216
Ending Page	220
File Size	186257
Page Count	5
File Format	PDF
ISBN	9781424435845
DOI	10.1109/ISWCS.2009.5285248
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-09-07
Publisher Place	Italy
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Computer science Virtual colonoscopy Null space Computer architecture Automatic control Parity check codes Hardware Code standards Sparse matrices Iterative decoding
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in