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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Ozlem Sen Dudak, C. Nakiboglu, B. |
| Copyright Year | 2003 |
| Description | Author affiliation: TUBITAK-BILTEN (Ozlem Sen) |
| Abstract | Summary form only given. Low power SoCs comprising MPUs and SRAMs are becoming increasingly important for high-speed PCs, mobile and medical equipment. The most effective and straightforward way for low power is to reduce the operating voltage VDD. For memory-rich high-speed SoCs, however, the reduction has been extremely difficult with device scaling due to the ever-larger subthreshold leakage and variability. For the LSI industry to continue to proliferate, we have to solve the problem, and, in doing so, open the door to our target: the 0.5-V nanoscale CMOS era. In this talk, first, the challenges and solutions are briefly explained from the viewpoint of circuit designs. Next, new logic gates utilizing gate-source reverse biasing schemes and a boosted word-line-voltage 6-T SRAM cell are proposed and evaluated by simulation in terms of low-VDD potential, stability, and speed. A comparison between an ultra-thin BOX planar FD-SOI and a FinFET is also made. Finally, power dissipation of a 0.5-V 25-nm SoC consisting of a 160-Mgate logic and a 1-Gb SRAM is estimated. |
| Starting Page | 630 |
| Ending Page | 634 |
| File Size | 255593 |
| Page Count | 5 |
| File Format | |
| ISBN | 0780381424 |
| DOI | 10.1109/RAST.2003.1303991 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2003-11-20 |
| Publisher Place | Turkey |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Artificial satellites Transmitters Power amplifiers Low earth orbit satellites Linearity Bandwidth Solid state circuits Satellite communication Power generation Driver circuits |
| Content Type | Text |
| Resource Type | Article |
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