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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Ouy, J. Kracht, M. Shukla, S.K. |
| Copyright Year | 2013 |
| Description | Author affiliation: Bradley Dept. of Electr. & Comput. Eng., Virginia Tech, Blacksburg, VA, USA (Ouy, J.; Kracht, M.; Shukla, S.K.) |
| Abstract | For reactive embedded software - designed by composing existing reactive components - ensuring correctness is not straightforward. The possibility of deadlock across components, mismatch in temporal behaviors at the connected interface signals, etc., could lead to non-reactivity or subtle bugs. Behavioral interface theories have been proposed for checking compatibility of components when reactive modules are being composed. Depending on the models of computation, various intermediate notions of behavioral interfaces may be defined. In the case of polychronous components, the clock relations and the data dependencies at the interfaces are usually used for checking compatibility. However, if the behavior of a component is time variant, these abstractions are insufficient to establish correctness of composition. To capture time varying behavior, we propose to add an automaton based abstraction based on predicates abstraction. This paper describes the extraction of the abstraction, along with proofs of equivalence and the description of a practical implementation of the technique. |
| Starting Page | 33 |
| Ending Page | 40 |
| File Size | 1468919 |
| Page Count | 8 |
| File Format | |
| ISBN | 9781479901036 |
| DOI | 10.1109/SAMOS.2013.6621103 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2013-07-15 |
| Publisher Place | Greece |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Computer bugs Automata Process control System recovery Synchronization Adders Clocks |
| Content Type | Text |
| Resource Type | Article |
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