NDLI: Low Power Discriminators With Input Offsets Correction For Fast Multichannel Recording ASIC

Content Provider	IEEE Xplore Digital Library
Author	Grybos, P. Idzik, M. Maj, P. Swientek, K.
Copyright Year	2006
Description	Author affiliation: AGH Univ. of Sci. & Technol. (Grybos, P.; Idzik, M.; Maj, P.; Swientek, K.)
Abstract	Multichannel ASIC for digital X-ray imaging requires one or more discriminators in each recording channel. The critical parameters of these discriminators are low power consumption and low offset spreads from channel to channel. In the readout electronics dedicated to work with high rates of input pulses the charge sensitive amplifier, filter stages and discriminators are often DC coupled. Such approach generates additional channel to channel spread of DC level at discriminators inputs. In this paper we present the structure of discriminators pair, which allows to select pulses according to their amplitudes and can work effectively in multichannel fast readout ASIC due to additional correction circuits implemented in each channel. We present the architecture of the discriminators, the results of Monte Carlo simulations of input offsets spreads and the measurement results of such structures which were implemented in 64-channel ASIC fabricated in 0.35 mum CMOS technology
Starting Page	316
Ending Page	320
File Size	435690
Page Count	5
File Format	PDF
ISBN	8392263227
DOI	10.1109/MIXDES.2006.1706591
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-06-22
Publisher Place	Poland
Access Restriction	Subscribed
Rights Holder	DEPT OF MICROELECTRONICS AND COMP SCIENC
Subject Keyword	Application specific integrated circuits Energy consumption Filters Pulse amplifiers Coupling circuits CMOS technology Digital recording Readout electronics X-ray imaging Disk recording
Content Type	Text
Resource Type	Article

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