NDLI: On Controlling Genuine Reject Rate in Multi-stage Biometric Verification

Content Provider	IEEE Xplore Digital Library
Author	Hossain, M.S. Balagani, K.S. Phoha, V.V.
Copyright Year	2013
Description	Author affiliation: New York Inst. of Technol., Old Westbury, NY, USA (Balagani, K.S.) \|\| Louisiana Tech Univ., Ruston, LA, USA (Hossain, M.S.; Phoha, V.V.)
Abstract	An important problem in multi-stage biometric verification is to select an appropriate reject region. A reject region says which samples to be rejected. Rejecting impostor samples does not incur any cost in terms of user inconvenience, however, erroneously rejecting genuine samples leads to both user and administrator inconvenience. The problem becomes severe in the applications that involve a huge number of biometric transactions. Such applications necessitate the reject rate of genuine samples to be controlled. However, to date, no work has studied on controlling genuine reject rate (GRR) in multi-stage biometric verification. In this paper, we focused on controlling GRR and to this end, developed a rejection method called symmetric rejection method. Our rejection method adds the following benefits to multi-stage biometric verification: (1) it enables the system administrator to control GRR, (2) it allows to calculate the reject region without estimation of score distributions, and (3) it does not use any assumption on the functional form of score distributions. We performed experiments on (1) two fingerprint datasets of 6000 users and (2) two face datasets of 3000 users. For fingerprint data, we achieved 18.96 percent to 70.89 percent reduction in EER by rejecting 1.5 percent to 9.4 percent genuine scores and for face data, we achieved 3.27 percent to 85.83 percent reduction in EER by rejecting 0.3 percent to 14.4 percent genuine scores.
Starting Page	194
Ending Page	199
File Size	436263
Page Count	6
File Format	PDF
ISBN	9780769549903
ISSN	21607516
DOI	10.1109/CVPRW.2013.36
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-06-23
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Training Measurement Error analysis Indexes Face Arrays
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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