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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Hua Teng |
| Copyright Year | 2010 |
| Description | Author affiliation: Computer institute, China West Normal University, CWNU, Nanchong Sichuan, China (Hua Teng) |
| Abstract | The essential components of future e-learning systems will include real-time video capture, video transmission, and video display; a high-definition image display at the receiver in the real-time teaching depends on the promise of a highresolution video and a greater compression. This paper designed a high-performance terminal for the real-time video capture in e-learning systems; it is a terminal not only built on FPGA module and DSP parallel working system but also enhanced by improved MPEG-4 algorithm. The experiment results of this terminal demonstrated a significant effectiveness of compressing a highresolution real-time video. |
| Starting Page | 102 |
| Ending Page | 105 |
| File Size | 229277 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781424465132 |
| e-ISBN | 9781424465163 |
| DOI | 10.1109/CISP.2010.5646300 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2010-10-16 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Real time systems parallel working system Encoding terminal digital technology supported learning independent study models real-time video Image coding e-learning Transform coding Digital signal processing Streaming media Field programmable gate arrays |
| Content Type | Text |
| Resource Type | Article |
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