NDLI: Design of a zero crossing BFSK demodulator for a wireless sensor

Content Provider	IEEE Xplore Digital Library
Author	Neifar, A. Trabelsi, H. Bouzid, G. Masmoudi, M.
Copyright Year	2012
Description	Author affiliation: National Engineers School of Sfax, B.P. W, Sfax 3038, Tunisia (Neifar, A.; Trabelsi, H.; Bouzid, G.; Masmoudi, M.)
Abstract	In this paper, a transistor-level simulation result of a Zero crossing BFSK demodulator is presented. The detector will be integrated into a frequency-hopped spread spectrum receiver operating in the 863–870 MHz ISM band, using the zigbee protocol (IEEE 802.15.4). This end to demodulate a received bit sequence with a bit rate equal to 20 kbps using 0.35 μm CMOS technology and a 3V power supply. The proposed demodulator dedicated to an application of low power and low cost can maintain good performance under process variation. The BER results show that the proposed demodulator needs only 10.9dB input signal_to_noise ratio to achieve a BER of 10–3 as specified in zigbee standard.
Starting Page	1
Ending Page	5
File Size	308758
Page Count	5
File Format	PDF
ISBN	9781467319263
e-ISBN	9781467319287
DOI	10.1109/DTIS.2012.6232953
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-05-16
Publisher Place	Tunisia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Limiting BFSK demodulation Wireless sensor Receivers Frequency shift keying Detectors RF receivers Limiting amplifier Digital filters 0.35μm CMOS technology Gain Demodulation
Content Type	Text
Resource Type	Article

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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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