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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Yanhong Huang Yongxin Zhao Longfei Zhu Qin Li Huibiao Zhu Jianqi Shi |
| Copyright Year | 2011 |
| Abstract | As an automotive industry standard of operating system specification, OSEK/VDX is widely applied in the process of designing and implementing the static operating system and the corresponding interfaces for automotive electronics. It is challenging to explore an effective method to support large-scale correctness verification of OSEK/VDX specification. In this paper, we employ process algebra CSP to describe and reason about a real code-level OSEK/VDX operating system. Thus the whole system is formally modeled as a CSP process which is encoded and implemented in process analysis toolkit (PAT). Furthermore, the expected properties are described and expressed in terms of the first-order logic. The properties are also established and verified in our framework. The result indicates that the whole system is deadlock-free and the scheduling scheme is sound with respect to the specification. |
| Starting Page | 142 |
| Ending Page | 149 |
| File Size | 274097 |
| Page Count | 8 |
| File Format | |
| ISBN | 9781457714870 |
| DOI | 10.1109/TASE.2011.11 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2011-08-29 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Real time systems Reactive power Analytical models Job shop scheduling Operating systems Resource management Arrays |
| Content Type | Text |
| Resource Type | Article |
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