NDLI: Improving Responsiveness of Hard Real-Time Embedded Systems

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Table of Contents

Message from the Chairs

TASE 2009 Committee Lists

TASE 2009 Additional Reviewers

Verification and Performance Analysis for Embedded Systems

Modular Development of Certified System Software

Towards Expressive Specification and Efficient Model Checking

Improving Responsiveness of Hard Real-Time Embedded Systems

Environmental Simulation of Real-Time Systems with Nested Interrupts

Semantics for Communicating Actors with Interdependent Real-Time Deadlines

An Efficient Algorithm for Finding Empty Space for Reconfigurable Systems

State Visibility and Communication in Unifying Theories of Programming

Semantics of Metamodels in UML

Refinement Algebra with Explicit Probabilism

Environment Abstraction with State Clustering and Parameter Truncating

Verification of Population Ring Protocols in PAT

Bounded Model Checking of ACTL Formulae

Coarse Grained Retrenchment and the Mondex Denial of Service Attacks

Enforcing Constraints on Life Cycles of Business Artifacts

Consistency Checking for LSC Specifications

Integrating Specification and Programs for System Modeling and Verification

A Framework and Language Support for Automatic Dynamic Testing of Workflow Management Systems

Fault-Based Test Case Generation for Component Connectors

Test Data Generation for Derived Types in C Program

Program Repair as Sound Optimization of Broken Programs

Modeling Web Applications and Generating Tests: A Combination and Interactions-guided Approach

Merging of Use Case Models: Semantic Foundations

Verifying Semistructured Data Normalization Using SWRL

Verifying Self-stabilizing Population Protocols with Coq

The Logical Approach to Low-Level Stack Reasoning

Constructing Program Invariants via Solving QBF

Using Architectural Constraints for Deadlock-Freedom of Component Systems with Multiway Cooperation

Formal Reasoning about Concurrent Assembly Code with Reentrant Locks

Algorithms for Computing Weak Bisimulation Equivalence

Interpreting a Successful Testing Process: Risk and Actual Coverage

Automated Test Case Generation Based on Coverage Analysis

Exploring Topological Structure of Boolean Expressions for Test Data Selection

On Testing 1-Safe Petri Nets

Verifying the Implementation of an Operating System Scheduler

A Tool for Estimating Memory Usage

A Framework for Dependency Evaluation of the Agent Oriented Methodologies Work Flows

Spontaneous Detection of Infinite Loops and Livelocks in Dynamic Testing of Concurrent Programs

Specifying and Verifying PLC Systems with TLA+

Domain Hierarchies: A Basic Theoretical Framework for Integrating Software Domains

Improve Semantic Web Services Discovery through Similarity Search in Metric Space

Parameterized Bisimulation Infinite Evolution Mechanism

Modeling MapReduce with CSP

Formal Specification and Experiments of an Expressive Human-Computer Ensemble System with Rehearsal

Towards Automated Software Verification Using Model Checking Techniques

Data Structure Shape Inference and Verification for OO Programs

DUMS: A Dynamical Updatable Monitoring System for Desktop PCs Used for Distributed Computing

Formal Representation and Analysis of a Near Miss Accident in N Sigma-labeled Calculus

Representing Aspects in Design

G-BLAST: BLAST Manager in an Heterogeneous Distributed Environment

Probabilistic Coordination Language for Component Dynamic Composition

Modeling Fault Tolerant Services in Service-Oriented Architecture

Heap Memory Requirements Analysis via Separation Logic

Automated Verification Using Unified Control Flows

MARS: Metamodel Recovery from Multi-tiered Models Using Grammar Inference

Formal Approaches to Deadlock Analysis in Competitions of Shared Web Resources

Measuring the Survivability of Object-Oriented Software

2008 2nd IFIP/IEEE International Symposium on Theoretical Aspects of Software Engineering

First Joint IEEE/IFIP Symposium on Theoretical Aspects of Software Engineering (TASE '07)

Improving Responsiveness of Hard Real-Time Embedded Systems

Content Provider	IEEE Xplore Digital Library
Author	Anderson, H. Siau-Cheng Khoo
Copyright Year	2009
Abstract	Abstract--- Hard real-time systems are found in many critical embedded applications, for example aeroplane flight control, industrial production line control, and so on. The safe scheduling of tasks in these hard real-time systems is crucial to their correct operation, but the hard constraints of this type of scheduling reduce the responsiveness of the systems. In this paper we show the application of runtime analysis in informing the design of hard real-time embedded systems by allowing scheduled tasks to be dynamically re-ordered to improve the average responsiveness, while still meeting the hard constraints imposed by the system. The technique is semi-automated, and uses the reduce computer algebra system to precalculate a symbolic form of the runtime of scheduled tasks. The symbolic form is used to modify the source code of the scheduler.
Starting Page	13
Ending Page	20
File Size	319358
Page Count	8
File Format	PDF
ISBN	9780769537573
DOI	10.1109/TASE.2009.21
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-07-29
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Real time systems Production systems Job shop scheduling Runtime Processor scheduling Industrial control Embedded system Electrical equipment industry Delay Aerospace control
Content Type	Text
Resource Type	Article

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