NDLI: Embedded real-time look-up table processing for high definition video signals

Content Provider	IEEE Xplore Digital Library
Author	Meza, S.N. Damstra, K.J. Rooy, J.V. Persa, S.
Copyright Year	2010
Description	Author affiliation: Technical University of Cluj-Napoca (Meza, S.N.) \|\| Grass Valley Nederland B.V. (Damstra, K.J.; Rooy, J.V.; Persa, S.)
Abstract	Look-up table (LUT) processing is based on the use of tabulated values for computing the output signal for various functions or sets of functions in an embedded system in order to achieve fast/real-time processing times. The paper evaluates the choices and tradeoffs that must be taken into account for a successful LUT based architecture implementation of the user-controlled functions in a system dealing with high definition (HD) video signals, more specifically HD video cameras. It is important to decide what control-like functions can be easily integrated into a LUT and at what cost. The results show that several factors must be taken into account when designing a LUT processing block: architecture, tables' sizing, value types for signal representation, signal-range to table mapping, choice of functions for updating/being integrated in the LUT block.
Starting Page	1
Ending Page	4
File Size	344739
Page Count	4
File Format	PDF
ISBN	9781424467242
e-ISBN	9781424467259
DOI	10.1109/AQTR.2010.5520751
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-05-28
Publisher Place	Romania
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Real time systems Process design Embedded computing look-up table processing Table lookup 1D LUTs Embedded system high definition video signals Computer architecture Signal processing Cameras Cost function 3D LUTs High definition video
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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