NDLI: Efficient Development Methodology for Multithreaded Network Application

Content Provider	IEEE Xplore Digital Library
Author	Nguyen Due Chinh Kandasamy, E. Lam Yoke Khei
Copyright Year	2007
Description	Author affiliation: Univ. Technol. PETRONAS, Tronoh (Nguyen Due Chinh)
Abstract	Multithreading is becoming increasingly important for modern network programming. In inter-process communication platform, multithreaded applications have much benefit especially to improve application's throughput, responsiveness and latency. However, developing good quality of multithreaded codes is difficult, because threads may interact with each others in unpredictable ways. Although modern compilers can manage threads well, but in practice, synchronization errors (such as: data race errors, deadlocks) required careful management and good optimization method. The goal of this work is to discover common pitfalls in multithreaded network applications, present a software development technique to detect errors and optimize efficiently multithreaded applications. We compare performance of a single threaded network application with multithreaded network applications, use tools called Intelreg VTunetrade Performance Analyzer, Intelreg Thread Checker and our method to efficiently fix errors and optimize performance. Our methodology is divided into three phases: First phase is performance analysis using Intelreg VTunetrade Performance Analyzer with the aim is to identify performance optimization opportunities and detect bottlenecks. In second phase, with Intelreg Thread Checker we allocate data races, memory leakage and debug the multithreaded applications. In third phase, we apply tuning and optimization to the multithreaded applications. With the understanding of the common pitfalls in multithreaded network applications, through the development and debugging methodology aforementioned above, developers are able to optimize and tune their applications efficiently.
Starting Page	1
Ending Page	5
File Size	3538254
Page Count	5
File Format	PDF
ISBN	9781424414697
DOI	10.1109/SCORED.2007.4451394
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-12-12
Publisher Place	Malaysia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Optimization methods Programming Throughput Application software Yarn Delay Phase detection Multithreading Vtune analyzer optimization System recovery Performance analysis throughput Intel thread checker
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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