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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Saad, Y. Tavernier, C. Ciappa, M. Fichtner, W. |
| Copyright Year | 2004 |
| Description | Author affiliation: Integrated Eng. Syst. AG, Zurich, Switzerland (Saad, Y.) |
| Abstract | In the present work, we demonstrate the use of appropriate 3D TCAD tools for process emulation and device simulation of floating-gate structures under consideration of process-induced geometry effects. The floating to control gate capacitance of representative dummy structures is extracted by full 3D simulation, with particular focus on effects related to the sidewall oxide, the spacer, and the bending radius of the polysilicon edges. The proposed methodology is assessed and compared with methods currently used in the industry. All simulations are performed by an innovative device simulation tool, a 3D process emulator, and a mesh generator that generates boundary-conforming meshes, allowing for very fine descriptions of the complex geometry. |
| Sponsorship | Nat. Aeronautics and Space Adm. (NASA) Air Force Res. Lab. (AFRL) Defense Threat Reduction Agency (DTRA) |
| Starting Page | 77 |
| Ending Page | 82 |
| File Size | 727708 |
| Page Count | 6 |
| File Format | |
| ISBN | 0780387260 |
| DOI | 10.1109/NVMT.2004.1380810 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2004-11-17 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Geometry Solid modeling Nonvolatile memory Computational modeling Emulation Predictive models Capacitance Systems engineering and theory Doping profiles Mesh generation |
| Content Type | Text |
| Resource Type | Article |
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