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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Di Wu Eilert, J. Dake Liu |
| Copyright Year | 2008 |
| Description | Author affiliation: Dept. of Electr. Eng., Linkoping Univ., Linkoping (Di Wu; Eilert, J.; Dake Liu) |
| Abstract | This paper presents the first programmable Lattice- Reduction Aided (LRA) symbol detector for Multiple-Input Multiple-Output (MIMO) and Orthogonal Frequency Division Multiple Access (OFDMA). The detector proposed is implemented using 65 nm ASIC technologies. Owing to the programmability, the detector can be dynamically switched between linear (e.g. MMSE) and lattice-reduction aided (e.g. LRA-MMSE) detectors by simply running another software subroutine. Therefore, it allows a good trade-off between performance and computational latency to be achieved under various scenarios. Along with the hardware, two algorithm simplifications (SCNT-LR and SOT-LR) are proposed for finding subcarriers with ill- conditioned channel matrices. And in the end, interpolated LR (I- LR) is proposed to further reduce the computational complexity for real-time implementations. |
| Starting Page | 293 |
| Ending Page | 297 |
| File Size | 370789 |
| Page Count | 5 |
| File Format | |
| ISBN | 9781424417070 |
| DOI | 10.1109/ICCSC.2008.68 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-05-26 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Application specific integrated circuits Baseband Processor scheduling OFDM Bit error rate Detectors WiMAX Very large scale integration Frequency conversion MIMO |
| Content Type | Text |
| Resource Type | Article |
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