NDLI: Analyzing fault effects in the 32-bit OpenRISC 1200 microprocessor

Content Provider	IEEE Xplore Digital Library
Author	Mehdizadeh, N. Shokrolah-Shirazi, M. Miremadi, S.G.
Copyright Year	2008
Description	Author affiliation: Dept. of Comput. Eng., Sharif Univ. of Technol., Tehran (Mehdizadeh, N.; Shokrolah-Shirazi, M.; Miremadi, S.G.)
Abstract	This paper presents an analysis of the effects and propagation of faults in the open-core 32-bit OpenRISC 1200 microprocessor. The analysis is based on a total of 13,000 transient faults injected into 65 parts of the CPU module in the OpenRISC 1200 core described at the RTL model. A comparison of the effects of faults on the various parts of the CPU including the pipeline's registers, the CPU component such as the register file, the control unit, and the ALU, and the data and address buses is done. It is shown that about 30%, 40% and 27% of injected faults terminated in address, data, and control errors respectively. About 28% of all injected faults resulted in failures.
Starting Page	648
Ending Page	652
File Size	297159
Page Count	5
File Format	PDF
ISBN	9780769531021
DOI	10.1109/ARES.2008.55
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-03-04
Publisher Place	Spain
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Fault tolerance Analytical models Reduced instruction set computing Digital systems Microprocessors Single event upset Cache memory Computer architecture Registers Transient analysis
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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