NDLI: Mixed-mode behavioral model of flexray physical layer transceiver

Content Provider	IEEE Xplore Digital Library
Author	Muller, C. Valle, M. Buzas, R. Skoupy, A.
Copyright Year	2009
Description	Author affiliation: On Semiconductors Corporation Brno, Czech Republic (Buzas, R.; Skoupy, A.) \|\| DIBE - Department of Biophysical and Electronic Engineering University of Genoa Genoa, Italy (Muller, C.; Valle, M.)
Abstract	The implementation of safety critical applications in internal vehicles requires a reliable wireline communication system to ensure enough bus line signal integrity. The design verification of in-vehicle electronic embedded system during the early stages of the system design is required and can be effectively achieved through behavioral simulations. The main difficulty is on modelling the mixed-mode communication interface, e.g. the transceiver, because it is a mixed-mode circuit. This paper introduces the mixed-mode behavioral model of Flexray physical layer transceiver and it presents the behavioral model verification. Several simulations were performed in order to demonstrate the effectiveness of the proposed model, regarding signal integrity, model behavior in different bus states, wake-up pattern detection, receiver sensibility and the timing characteristics. The performance was evaluated by comparing the CPU usage time of the model (implemented in VHDL-AMS) with Spectre simulations. The VHDL-AMS model was clearly faster than Spectre and it is fully compliant with the Flexray standard specifications.
Starting Page	527
Ending Page	530
File Size	501527
Page Count	4
File Format	PDF
ISBN	9781424438969
DOI	10.1109/ECCTD.2009.5275043
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-08-23
Publisher Place	Turkey
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Microcontrollers Circuit simulation Vehicle safety Embedded system Prototypes Physical layer Controllability Transceivers Hardware Consumer electronics
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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