NDLI: Simulation of digital broadband system-on-chip

Content Provider	IEEE Xplore Digital Library
Author	Shalash, A.F.
Copyright Year	2010
Description	Author affiliation: Department of Electronics and Communications, Cairo University, Egypt (Shalash, A.F.)
Abstract	Simulation of a complex system on chip is a must-do exercise to increase the level of confidence that the final product will actually work. Even though hitting the 100% confidence level might seem like a daunting task, careful planning and good methodology can ensure a reasonable level of confidence, without imposing a big delay on the project design cycle. The appropriate resources allocation, such as the Front-end functionality, ASIC functionality and programmable cores, is the main target for this system simulations effort. The division of functions among system resources can be a bit tricky. From one side, a given sub-block can be critical in the system performance, yet on the other side, this sub-block proves to be an expensive block. This paper presents the simulations methodology used for multiple examples showing how the local optimization of sub-blocks will not always lead to the global optimum solution.
Starting Page	421
Ending Page	425
File Size	687501
Page Count	5
File Format	PDF
ISBN	9781424458820
e-ISBN	9781424458844
DOI	10.1109/SYSTEMS.2010.5482346
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-04-05
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Bluetooth Bit error rate Optimization methods SoC local optimization Delay Design optimization simulations System performance Cost function Sampling methods System-on-a-chip Mathematical model
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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