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Content Provider | IEEE Xplore Digital Library |
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Author | Pakhira, M.K. De, R.K. |
Copyright Year | 2004 |
Description | Author affiliation: Dept. of Comput. Sci. & Eng., Kalyani Gov. Eng. Coll., India (Pakhira, M.K.) |
Abstract | Genetic algorithms (GAs) are very commonly used as function optimizers, basically due to their search capability. A number of different serial and parallel versions of GA exist. A pipelined version of a commonly used genetic algorithm is described. The main idea of achieving pipelined execution of different operations of GA is to use a stochastic selection function which works with the fitness value of the candidate chromosome only. The GA with this selection operator is termed PLGA. When executed in a CGA (classical genetic algorithm) framework, the stochastic selection scheme gives performances comparable with the roulette-wheel selection. In the pipelined hardware environment, PLGA is much faster than the CGA. When executed on similar hardware platforms, PLGA may attain a maximum speedup of four over CGA. However, if CGA is executed in a uniprocessor system, the speedup is much more. A comparison of PLGA against PGA (parallel genetic algorithms) is also done. |
Starting Page | 253 |
Ending Page | 257 |
File Size | 557908 |
Page Count | 5 |
File Format | |
ISBN | 0780388941 |
DOI | 10.1109/ISSNIP.2004.1417471 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2004-12-14 |
Publisher Place | Australia |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Computer science Genetic mutations Government Stochastic processes Genetic engineering Hardware Biological cells Genetic algorithms Electronics packaging Pipeline processing |
Content Type | Text |
Resource Type | Article |
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