NDLI: FPGA Implementation of a Support Vector Machine Based Classification System and Its Potential Application in Smart Grid

Content Provider	IEEE Xplore Digital Library
Author	Xiaohui Song Hong Wang Lingfeng Wang
Copyright Year	2014
Description	Author affiliation: Dept. of Electr. Eng. & Comput. Sci., Univ. of Toledo, Toledo, OH, USA (Xiaohui Song; Lingfeng Wang) \|\| Eng. Technol. Dept., Univ. of Toledo, Toledo, OH, USA (Hong Wang)
Abstract	Support Vector Machines (SVMs) is a popular classification and regression prediction tool that uses supervised machine learning theory to maximize the predictive accuracy. This paper focuses on the field programmable gate array (FPGA) implementation of a Support Vector Machine classification system. Owing to the advanced parallel calculation feature provided by FPGA, a fast data classification can be achieved by the FPGA-based two-class SVM classifier. The classification system works both in linear mode and non-linear mode, depending on the dimensions of the classification. Simulated results demonstrate that the classification system is effective in fast data classification, and it is a promising technique for Smart Grid to strengthen its communication security.
Starting Page	397
Ending Page	402
File Size	395073
Page Count	6
File Format	PDF
ISBN	9781479931873
e-ISBN	9781479931880
DOI	10.1109/ITNG.2014.45
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-04-07
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Support vector machines Training Data classification Accuracy smart grid field programmable gate array (FPGA) Computer architecture Classification algorithms Kernel parallel processing Field programmable gate arrays support vector machines (SVMs)
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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