NDLI: Efficient Implementation of Galois Field Fixed Field Constant Multiplication

Content Provider	IEEE Xplore Digital Library
Author	Elbirt, A.J. Paar, C.
Copyright Year	2006
Description	Author affiliation: Dept. of Comput. Sci., Massachusetts Lowell Univ., MA (Elbirt, A.J.)
Abstract	Efficient implementation of block ciphers is critical towards achieving both high security and high speed processing. Numerous block ciphers have been proposed and implemented, using a wide and varied range of functional operations. Existing microprocessor architectures do not provide this broad range of support. However, the advent of intellectual property (IP) microprocessor cores presents the opportunity to augment existing datapaths and instruction sets to add acceleration modules. Therefore, we present a hardware architecture that achieves efficient implementation of generalized Galois field fixed field constant multiplication, a core operation of Rijndael, chosen by the National Institute of Standards and Technology (NIST) as the advanced encryption standard (AES) advanced encryption algorithm in October of 2000. A detailed discussion of the architecture is provided and an analysis of system performance and resource utilization is performed to demonstrate the efficiency versus other implementations
Starting Page	172
Ending Page	177
File Size	211960
Page Count	6
File Format	PDF
ISBN	0769524974
DOI	10.1109/ITNG.2006.59
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-04-10
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	block cipher Data security Instruction sets cryptography Galois fields Microprocessors embedded systems Intellectual property NIST Hardware Performance analysis galois field Cryptography Acceleration
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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