NDLI: Resistively-Terminated Via-Stubs for Signal Integrity Improvement in the Semiconductor Test Board

Content Provider	IEEE Xplore Digital Library
Author	Sung-Ho Joo Dong-Yeop Kim Sang-Hoon Lee Se-Jang Oh Ki-Sang Kang Hai-Young Lee
Copyright Year	2007
Description	Author affiliation: Dept. of Electron. Eng., Ajou Univ., Gyeonggi (Sung-Ho Joo; Dong-Yeop Kim; Hai-Young Lee)
Abstract	In this paper, a resistive termination of via-stubs is proposed for the improvements of signal integrity (SI) in the multi-layered semiconductor test board. In current semiconductor test boards, as the resonance mode excited by the open via-stub, unused portion of plated through holes (PTH) results in SI degradation. Resistively-terminated via-stubs improve SI by reducing the via-stub effect causing the rounded digital pulse edge in time domain. The proposed structure achieves the shortened transition time (Tr/Tf) and enhanced timing jitter. It is expected to extend the maximum practicable data rate of the semiconductor test board with the proposed structure.
Starting Page	121
Ending Page	124
File Size	3157082
Page Count	4
File Format	PDF
ISBN	9781424415564
DOI	10.1109/KJMW.2007.4402255
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-11-15
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Costs Q factor Semiconductor devices Printed circuits viastub Electronic equipment testing Circuit testing multi-layered printed circuit board (MLPCB) Automatic test equipment Automatic test equipment (ATE) Insertion loss Resonance signal integrity (SI) Semiconductor device testing
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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