NDLI: Analysis of data quality issues in Wide Area Monitoring and Control systems

Content Provider	IEEE Xplore Digital Library
Author	Kun Zhu Chenine, M. König, J. Nordström, L.
Copyright Year	2010
Description	Author affiliation: Industrial Information and Control Systems, Royal Institute of Technology, KTH, Sweden (Kun Zhu; Chenine, M.; König, J.; Nordström, L.)
Abstract	Synchronized phasor measurement based Wide Area Monitoring and Control (WAMC) system is becoming a reality with international research and development both in academia and industry. Timely and accurate data with high resolutions holds great promise for more responsible and advanced grid control and operation. Currently, most of the research focuses on the different control schemes and applications. A relatively less addressed aspect is the dependency of the WAMC system on the performance of the Information and Communication Technology (ICT) infrastructure, without whose support the projected functionalities of the WAMC systems will not be achieved. Possible input delay brought by the complex data transfer and processing processes in WAMC systems are presented at the beginning of this paper. Thereafter, simulations where delayed phasor measurements are fed to a typical WAMC application - Static Var Compensation (SVC) are conducted iteratively to detect its maximum tolerated delay. Based on this maximum tolerated delay, the consequences of missing certain data in the phaor packets have been studied. Furthermore, data quality requirements to design a reliable SVC function are analyzed based on simulation results. In conjunction with the requirement discussion, the paper is concluded by proposing a robust ICT architecture to mitigate the aforementioned data quality issues.
Starting Page	1
Ending Page	8
File Size	653521
Page Count	8
File Format	PDF
ISBN	9781424474660
e-ISBN	9781424474677
e-ISBN	9781424474653
DOI	10.1109/IREP.2010.5563291
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-08-01
Publisher Place	Brazil
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Voltage measurement ICT infrastructures remote signal based SVC Static VAr compensators PMU Phasor measurement units incompleteness Communication networks WAMC systems phasor measurement delay Delay Sorting
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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