NDLI: On the attack of misaligned traces by power analysis methods

Content Provider	IEEE Xplore Digital Library
Author	Qizhi Tian Huss, S.A.
Copyright Year	2012
Description	Author affiliation: Integrated Circuits and Systems Lab (ICS), Hochschulstr. 10, 64289 Darmstadt, TU Darmstadt, Germany (Qizhi Tian; Huss, S.A.)
Abstract	Random clock armed cryptosystems inject an intended misalignment in captured power traces while the system is running encryption or decryption. This is a powerful counter-measure against Correlation Power Analysis (CPA) in practice. In order to remove such a countermeasure, a trace preprocessing is necessary before mounting power attacks. In this paper, we consider both the established attacking method CPA and the recently proposed approach Power Amount Analysis (PAA) as well as novel methodologies for removing this countermeasure in the power traces in order to improve the attacks. Therefore, we introduce first a new feature to the PAA attack, which can effectively neutralize the clock frequency effects resulting from a random clock featured cryptosystem running at higher clock frequency. Then we suggest a novel peak position based trace alignment. At the end, a complete framework for preprocessing misaligned power traces is proposed. The application example shows that the PAA attack can effectively neutralize the clock frequency effects and the complete framework is able to handle randomly misaligned power traces very well thus eventually improving the performance of both the CPA and the PAA attacks.
Starting Page	28
Ending Page	34
File Size	352525
Page Count	7
File Format	PDF
ISBN	9781467329606
e-ISBN	9781467329613
DOI	10.1109/ICCES.2012.6408478
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-11-27
Publisher Place	Egypt
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Traces Matching AES-128 Block Cipher Correlation Power demand Time domain analysis Time frequency analysis Correlation Power Analysis Cryptography Power Amount Analysis Power Trace Alignment Pattern matching Clocks
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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