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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Huy-Nam Nguyen Vu-Duc Ngo Hae-Wook Choi |
| Copyright Year | 2006 |
| Description | Author affiliation: Syst. VLSI Lab., Inf. & Commun. Univ., Daejeon (Huy-Nam Nguyen; Vu-Duc Ngo; Hae-Wook Choi) |
| Abstract | Network-on-chip (NoC) is being proposed as a scalable and reusable communication platform for future SoC applications. An important problem in NoC design is deciding the type of routing which is one of the most crucial key factors that greatly affects the NoC architecture based systems performance. Currently, most of the proposals for routing in NoC are based upon deterministic routing mechanism because it gives better latency at low packet injection and requires less resources while guaranteeing an orderly packet arrival. However, the disadvantage of deterministic routing is that it cannot respond to dynamic network condition such as congestion. When the network becomes congested, adaptive routing provides better throughput and lower latency by allowing alternate paths. In this paper, using simulation, we evaluate the performance of adaptive routing algorithm to deterministic routing strategy respected to throughput, power consumption and latency. The simulation environment is 2D-mesh based NoC topology including different kinds of mapping video object plane decoder (VOPD) application onto this architecture. The experiment results prove the adaptive routing performance under network congestion occurrence |
| Starting Page | 62 |
| Ending Page | 65 |
| File Size | 4290317 |
| Page Count | 4 |
| File Format | |
| ISBN | 1424402719 |
| DOI | 10.1109/ICCES.2006.320426 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2006-11-05 |
| Publisher Place | Egypt |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Energy consumption Adaptive systems Network topology System performance Network-on-a-chip Routing Throughput Decoding Proposals Delay |
| Content Type | Text |
| Resource Type | Article |
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