NDLI: Smart dynamic memory allocator for embedded systems

Content Provider	IEEE Xplore Digital Library
Author	Ramakrishna, M. Jisung Kim Woohyong Lee Youngki Chung
Copyright Year	2008
Description	Author affiliation: LSI Div., Samsung Semicond. Bus. (Ramakrishna, M.; Jisung Kim; Woohyong Lee; Youngki Chung)
Abstract	Dynamic memory (DM) allocation is one of the most crucial components of modern software engineering. It offers a greatest flexibility to the software systemspsila design; nevertheless, developers of real-time systems often avoid using dynamic memory allocation due to its problems like unbounded or long bounded response time and memory fragmentation. However, the modern complex applications like multimedia streaming and network applications made the dynamic memory allocation mandatory for applicationspsila design. The major challenges of memory allocator are minimizing fragmentation, providing a good response time, and maintaining a good locality among the memory blocks. This paper introduces a new smart dynamic memory allocator particularly for embedded systems that have limited memory and processing power. It aimed at addressing the major challenges of dynamic memory allocator. The smart allocator predicts the short-lived objects and allocates those objects on one side of the heap memory and remaining objects on other side of the heap memory for effective utilization of memory footprint. The allocator is implemented with enhanced multilevel segregated mechanism using lookup tables and hierarchical bitmaps that ensure very good response time and reliable timing performance. The proposed algorithm has shown excellent experimental results, with respect to both response time and memory footprint usage, as compared to the well known algorithms. In addition, this paper presents a memory intensive synthetic (MIS) work load, which can model the allocation behavior of most of the real applications.
Starting Page	1
Ending Page	6
File Size	619363
Page Count	6
File Format	PDF
ISBN	9781424428809
DOI	10.1109/ISCIS.2008.4717922
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-10-27
Publisher Place	Turkey
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Real time systems Table lookup Application software Delay Software design Embedded systems Dynamic memory allocation Embedded system Streaming media Software systems Delta modulation Memory workload Software engineering
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in