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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Elkeelany, O. Todakar, V.S. |
| Copyright Year | 2011 |
| Abstract | Smart Grid (SG) is the next generation's power grid system. Delivering control, monitoring and management data to grid elements often requires the efficient archival of acquired information. The main objective of this research is to design an experimental platform for efficient, on-chip, real-time data concentrator for accessing data from a Secure Digital flash memory card using the SD bus protocol. All the hardware design is done using Verilog hardware descriptive language and implemented in Field Programmable Gate Array (FPGA). The data access from the SD card is implemented completely using Verilog and hence there is no use of any microcontroller or on-chip general purpose processors. And since the complete design is a single purpose system, no extra hardware is required. The design has four independent modules for the required different operations on the SD memory card. These four modules are for single block write, multiple block write, single block read, and multiple block read operations. A temporary data is either stored internally in an array of registers or externally in the Synchronous RAM for the analysis purposes. The bidirectional access takes place correctly and the data integrity has been verified using Cyclic Redundancy Code in both FPGA processor as well as the SD card controller. The design is implemented on the Altera's Cyclone II EP2C35F672C6 FPGA chip using 1GB SanDisk SD card and has shown a maximum data concentration rate of 25 Mbps. |
| Starting Page | 625 |
| Ending Page | 630 |
| File Size | 428617 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781467300391 |
| e-ISBN | 9781467300407 |
| e-ISBN | 9781467300384 |
| DOI | 10.1109/GLOCOMW.2011.6162527 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2011-12-05 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Program processors Flash memory Verilog HDL Hardware Flash memory read/write Timing Hardware design languages SD Protocol Field programmable gate arrays Clocks |
| Content Type | Text |
| Resource Type | Article |
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